(cad/iverilog) Candidate for updating 12.0

master
Makoto mef Fujiwara 2024-05-19 00:22:23 +09:00 committed by Makoto Fujiwara
parent 170ceefe55
commit 1e6a7c07f5
8 changed files with 156 additions and 0 deletions

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iverilog/DESCR Normal file
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Icarus Verilog is intended to compile ALL of the Verilog HDL as described in
the IEEE-1364 standard. Of course, it's not quite there yet. It does currently
handle a mix of structural and behavioral constructs.
Icarus Verilog is not aimed at being a simulator in the traditional sense, but
a compiler that generates code employed by back-end tools.

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iverilog/Makefile Normal file
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# $NetBSD: Makefile,v 1.3 2024/05/18 14:49:59 mef Exp $
DISTNAME= verilog-12.0
# There is confision in naming of this software, use iverilog as it's saner
PKGNAME= i${DISTNAME}
CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_GITHUB:=steveicarus/}
GITHUB_TAG= v${PKGVERSION_NOREV:S/./_/}
MAINTAINER= dmcmahill@NetBSD.org
HOMEPAGE= https://steveicarus.github.io/iverilog/
COMMENT= Verilog simulation and synthesis tool (stable release version)
LICENSE= gnu-gpl-v2
USE_LANGUAGES= c c++
#RKSRC= ${WRKDIR}/${PKGNAME_NOREV}
GNU_CONFIGURE= yes
USE_TOOLS+= gmake bison lex autoconf
TEST_TARGET= check
INSTALLATION_DIRS+= share/doc/ivl
pre-configure:
(cd ${WRKSRC}; autoconf)
# Additional files
post-install:
cd ${WRKSRC}; ${INSTALL_DATA} \
QUICK_START.txt \
README.md \
${DESTDIR}${PREFIX}/share/doc/ivl
.include "../../devel/gperf/buildlink3.mk"
.include "../../devel/zlib/buildlink3.mk"
.include "../../archivers/bzip2/buildlink3.mk"
.include "../../mk/readline.buildlink3.mk"
.include "../../mk/bsd.pkg.mk"

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iverilog/PLIST Normal file
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@comment $NetBSD$
bin/iverilog
bin/iverilog-vpi
bin/vvp
include/iverilog/_pli_types.h
include/iverilog/acc_user.h
include/iverilog/ivl_target.h
include/iverilog/sv_vpi_user.h
include/iverilog/veriuser.h
include/iverilog/vpi_user.h
lib/ivl/blif-s.conf
lib/ivl/blif.conf
lib/ivl/blif.tgt
lib/ivl/cadpli.vpl
lib/ivl/include/constants.vams
lib/ivl/include/disciplines.vams
lib/ivl/ivl
lib/ivl/ivlpp
lib/ivl/null-s.conf
lib/ivl/null.conf
lib/ivl/null.tgt
lib/ivl/pcb-s.conf
lib/ivl/pcb.conf
lib/ivl/pcb.tgt
lib/ivl/sizer-s.conf
lib/ivl/sizer.conf
lib/ivl/sizer.tgt
lib/ivl/stub-s.conf
lib/ivl/stub.conf
lib/ivl/stub.tgt
lib/ivl/system.vpi
lib/ivl/v2005_math.vpi
lib/ivl/v2009.vpi
lib/ivl/va_math.vpi
lib/ivl/vhdl-s.conf
lib/ivl/vhdl.conf
lib/ivl/vhdl.tgt
lib/ivl/vhdl_sys.vpi
lib/ivl/vhdl_textio.vpi
lib/ivl/vhdlpp
lib/ivl/vlog95-s.conf
lib/ivl/vlog95.conf
lib/ivl/vlog95.tgt
lib/ivl/vpi_debug.vpi
lib/ivl/vvp-s.conf
lib/ivl/vvp.conf
lib/ivl/vvp.tgt
lib/libveriuser.a
lib/libvpi.a
man/man1/iverilog-vpi.1
man/man1/iverilog.1
man/man1/vvp.1
share/doc/ivl/QUICK_START.txt
share/doc/ivl/README.md

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iverilog/TODO Normal file
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- Find ChangeLog

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iverilog/buildlink3.mk Normal file
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# $NetBSD: buildlink3.mk,v 1.2 2018/01/07 13:03:56 rillig Exp $
BUILDLINK_TREE+= iverilog
.if !defined(IVERILOG_BUILDLINK3_MK)
IVERILOG_BUILDLINK3_MK:=
BUILDLINK_API_DEPENDS.iverilog+= iverilog>=10.1.1
BUILDLINK_PKGSRCDIR.iverilog?= ../../cad/iverilog
.include "../../devel/gperf/buildlink3.mk"
.include "../../devel/zlib/buildlink3.mk"
.include "../../archivers/bzip2/buildlink3.mk"
.endif # IVERILOG_BUILDLINK3_MK
BUILDLINK_TREE+= -iverilog

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iverilog/distinfo Normal file
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$NetBSD: distinfo,v 1.7 2021/10/26 10:04:12 nia Exp $
BLAKE2s (verilog-12.0.tar.gz) = a33ac3b9c33cc7600355da36a64b82411d00eb26c385b717052a0817aa1ee22b
SHA512 (verilog-12.0.tar.gz) = a8e112f760903335ef2fbf00529e5fe282b83c1f583c4316373b9410d7fad2a53d5c4adb82dd62491c14a620cb5b1fab117cb0cde638c86b65fe5b7b0dd07152
Size (verilog-12.0.tar.gz) = 2995096 bytes
SHA1 (patch-Makefile.in) = 9e66fedfa8487be3b7f82c152504404545f8bd06
SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa
SHA1 (patch-cadpli_Makefile.in) = ed21a5f529ac449c26b831cbd5fde052d9ed5466
SHA1 (patch-tgt-pcb_Makefile.in) = 0ea212a678aabd7e3d131322fd1a867b3e22611f
SHA1 (patch-vhdlpp_Makefile.in) = feed15f8e8e60c73b0f1f25a62d30fec7fa25a01
SHA1 (patch-vvp_Makefile.in) = 67bef8f6bbf03c8cf548785f5d8124e03771026a

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iverilog/patches/patch-aa Normal file
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$NetBSD: patch-aa,v 1.1 2016/10/08 23:01:45 kamil Exp $
gcc44 fixes
--- elab_net.cc.orig 2010-09-27 17:42:32.000000000 +0000
+++ elab_net.cc
@@ -26,6 +26,7 @@
# include <cstdlib>
# include <cstring>
+# include <memory>
# include <iostream>
# include "ivl_assert.h"

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$NetBSD: patch-cadpli_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $
gcc -std=gnu99 -shared -L/usr/lib -Wl,-R/usr/lib -L/usr/pkg/lib -Wl,-R/usr/pkg/lib -o cadpli.vpl cadpli.o ../libveriuser/libveriuser.o -L../vvp -lvpi
mkdir: dep: Not a directory
Makefile:52: recipe for target 'dep' failed
--- cadpli/Makefile.in~ 2013-08-20 04:10:31.000000000 +0900
+++ cadpli/Makefile.in 2013-12-20 22:03:29.000000000 +0900
@@ -51,7 +51,7 @@ check: all
dep:
mkdir dep
-%.o: %.c
+%.o: %.c dep
$(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $<
mv $*.d dep